The disclosed invention is directed generally to hybrid multilayer circuit structures, and is directed more particularly to a staggered horizontal inductor structure formed in a unitized multilayer circuit structure.
Hybrid multilayer circuit structures, also known as hybrid microcircuits, implement the interconnection and packaging of discrete circuit devices, and generally include a unitized multilayer circuit structure either formed on a single substrate layer using thick film or thin film techniques, or as a multilayer substrate comprising a plurality of integrally fused insulating layers (e.g., ceramic layers) having conductor traces disposed therebetween. The discrete circuit devices (e.g., integrated circuits) are commonly mounted on the top insulating layer so as not to be covered by another insulating layer or on a insulating layer having die cutouts formed thereon to provide cavities for the discrete devices. Passive components such as capacitors, inductors, and resistors can be formed on the same layer that supports the discrete devices, for example, by thick film processes, or they can be formed between the insulating layers, for example, also by thick film processes. Electrical interconnection of the conductors and components on the different layers is achieved with vias or holes appropriately located and formed in the insulating layers and filled with conductive material, whereby the conductive material is in contact with predetermined conductive traces between the layers that extend over or under the vias.
A known inductor structure formed in a unitized multilayer circuit structure is comprised of a first plurality of parallel elongated conductive traces formed on one layer, a second plurality of parallel elongated conductive traces formed on a different layer, and conductive vias for interconnecting the elongated conductive traces such that the conductive strips and the interconnecting vias form windings around dielectric material. A consideration with such inductor structure is the requirement with known fabrication processes that conductive traces can be spaced by no less that specified limits. This results in inductive components that are larger and have more loss than typical wirewound inductive elements.